The CPU Fabrication Area consists of two sub-areas: the core processor (left) and
memory module (right). Both areas use ICs fabricated in Stage 2. Only one (1)
component may be placed in any designated receptacle. ICs may only be used for
fabrication if they exist within inventory. Stage 3 game pieces are considered
properly placed if they are fully inside the designated scoring receptacle and flush
with the bottom surface.
Core Processor Area
The Core Processor Area, on the left, requires three Registers, an
Instruction Decoder, and an ALU. Registers are created by properly
placing a D-Latch within any designated Register receptacle. The
Instruction Decoder is created by properly placing a Decoder within the
designated Instruction Decoder receptacle. The ALU requires placing of
both a MUX and an Adder in their designated receptacle. Core processor
ICs may be placed over multiple matches.
For example, a team places two (2) Registers, one (1) MUX, and one (1)
Instruction Decoder in a match. The next match they place one (1)
Register and one (1) Adder. At the end of the second match, they would be
awarded one (1) ALU (MUX + Adder) and would have three (3)
Registers, one (1) ALU and one (1) Instruction Decoder in inventory to be
used towards fabricating a CPU.
The Memory Module Area, on the right, is capable of fabricating two
types of memory modules: an 8-bit Memory Module and a 32-bit Memory
Module. To fabricate an 8-bit Memory Module requires properly placing
one D-Latch within any designated Memory Unit receptacle. To fabricate
a 32-bit memory module requires properly placing four D-Latches within
the designated Memory Unit receptacles and properly placing one
Decoder within the designated Address Decoder receptacle within the
same match.
If more than one D-Latch is properly placed within the designated
Memory Unit receptacles but no Decoder is properly placed in the
Address Decoder receptacle, a single 8-bit Memory Module will be
fabricated and placed into inventory if the proper prerequisite inventory
exists.
If a Decoder is properly placed within the designated Address Decoder
receptacle but between one (1) and three (3) D-Latches are properly
placed within the designated Memory Unit receptacle, a single 8-bit
Memory Module will be fabricated and placed into inventory if the proper
prerequisite inventory exists.
Any inventory placed which is not consumed in the fabrication of a CPU
is neither removed from inventory nor awarded points.
(Taken from the 2013 Game Specific Rules document.)
memory module (right). Both areas use ICs fabricated in Stage 2. Only one (1)
component may be placed in any designated receptacle. ICs may only be used for
fabrication if they exist within inventory. Stage 3 game pieces are considered
properly placed if they are fully inside the designated scoring receptacle and flush
with the bottom surface.
Core Processor Area
The Core Processor Area, on the left, requires three Registers, an
Instruction Decoder, and an ALU. Registers are created by properly
placing a D-Latch within any designated Register receptacle. The
Instruction Decoder is created by properly placing a Decoder within the
designated Instruction Decoder receptacle. The ALU requires placing of
both a MUX and an Adder in their designated receptacle. Core processor
ICs may be placed over multiple matches.
For example, a team places two (2) Registers, one (1) MUX, and one (1)
Instruction Decoder in a match. The next match they place one (1)
Register and one (1) Adder. At the end of the second match, they would be
awarded one (1) ALU (MUX + Adder) and would have three (3)
Registers, one (1) ALU and one (1) Instruction Decoder in inventory to be
used towards fabricating a CPU.
The Memory Module Area, on the right, is capable of fabricating two
types of memory modules: an 8-bit Memory Module and a 32-bit Memory
Module. To fabricate an 8-bit Memory Module requires properly placing
one D-Latch within any designated Memory Unit receptacle. To fabricate
a 32-bit memory module requires properly placing four D-Latches within
the designated Memory Unit receptacles and properly placing one
Decoder within the designated Address Decoder receptacle within the
same match.
If more than one D-Latch is properly placed within the designated
Memory Unit receptacles but no Decoder is properly placed in the
Address Decoder receptacle, a single 8-bit Memory Module will be
fabricated and placed into inventory if the proper prerequisite inventory
exists.
If a Decoder is properly placed within the designated Address Decoder
receptacle but between one (1) and three (3) D-Latches are properly
placed within the designated Memory Unit receptacle, a single 8-bit
Memory Module will be fabricated and placed into inventory if the proper
prerequisite inventory exists.
Any inventory placed which is not consumed in the fabrication of a CPU
is neither removed from inventory nor awarded points.
(Taken from the 2013 Game Specific Rules document.)
Last edited by Chandler Bise from BrewTech Robotics Inc. on 11/16/13 at 4:45 PM